Perl 6 - the future is here, just unevenly distributed

IRC log for #moarvm, 2015-11-22

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All times shown according to UTC.

Time Nick Message
00:14 diakopter well, caching the object's idx (where I think it would be cached) shaves 8% off core setting compilation time, but I get a 'Probable version skew' error when building restricted setting
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00:14 diakopter so it either needs rebootstrapped or there's a make dependency problem or I'm stoopid
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01:00 diakopter .tell jnthn shaved 8% off CORE compilation by writing the idx after looking it up in interp.c http://i.imgur.com/WX35mFe.png
01:50 timotimo diakopter: did you get the build problem fixed in the time since then?
01:51 diakopter yes, the build problem was for an earlier attempt (not in interp.c)
01:53 diakopter here's the addl line for OP(scgetobjidx):
01:53 diakopter MVM_set_idx_in_sc(&GET_REG(cur_op, 4).o->header, GET_REG(cur_op, 0).i64);
01:55 diakopter timotimo: (I tried to cache it in various places, interp.c was the only safe one)
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02:47 Topic for #moarvm is now https://github.com/moarvm/moarvm | IRC logs at  http://irclog.perlgeek.de/moarvm/today
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13:32 brrt goood * #moarvm
13:32 brrt i think i finally know a solution to a problem that's been bugging me
13:32 brrt well, a few solutions to some problems
13:33 nwc10 good *, brrt
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13:38 brrt good *, nwc10
13:40 brrt problem one is, how to deal with the fact that register flow is broken during the compilation of an epxression tree as a result of the expression tree containing calls and conditionals
13:41 brrt well, i'm not 100% finished with it, but i think the best thing is to divide the (linearised) tile list into ... basic blocks
13:41 brrt (such innovation, many wow)
13:46 brrt the second problem was how to ensure that some operations have their operands in speciifc registers
13:46 brrt for instance, imul and idiv operands
13:46 brrt need rax/rcx pair
13:49 brrt so the solution, as far as i can see, is to give the tile a register flags field and implement a platform-specific flag decoder which can assign registers
13:50 brrt these
13:50 brrt 'flagged' tiles can then be scanned first to assign registers first
13:51 brrt whereas unflagged tiles can use any old register
13:54 brrt dunno if any of that makes any sense.. :-)
13:57 nwc10 I'm not the right person to ask that question to
13:57 brrt hmm... well, ok
13:57 brrt :-)
13:59 * brrt brb
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14:08 brrt anyway, i'm happy because i have a clear and reachable goal again
14:10 brrt anyway, off again
14:10 brrt see you
14:10 brrt have a nice sunday :-)
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17:25 diakopter best core setting compilation time in a bunch of runs (without the one-line patch above): 72.0 seconds
17:26 timotimo on my machine i usually get a bit under 50
17:26 diakopter try it with the patch?
17:27 diakopter 50 for stage parse or the whole thing
17:28 timotimo parse stage
17:28 timotimo right, you're measuring everything
17:28 diakopter most of the improvement is actually in optimize/mast
17:28 timotimo where does that line go?
17:28 timotimo beginning? end?
17:28 diakopter best core setting compilation time in a bunch of runs (with the patch): 67.6 seconds
17:28 timotimo ah, at the end
17:29 timotimo my computer is too busy for a good benchmark at the moment
17:30 diakopter ok, moving onto the next hotspot that seems possible aberrant
17:30 diakopter *possibly
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22:46 hoelzro o/ #moarvm
22:46 hoelzro I'm looking at a memory leak in cleaning up comp units; it seems that body->callsites[i]->arg_flags is malloc'd, but never freed
22:47 hoelzro problem is, callsites[i] may sometimes refer to a common callsite, so we can't just free its arg_flags
22:47 hoelzro should I add a way to check if a callsite is a common callsite? or maybe there's a better way to go about this?
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